Lithography Simulation Engineer | TSMC North America

Date Posted: 
Wednesday, January 6, 2021
Position Location: 
San Jose, CA
Job Description: 

Hiring Manager: Director, Optimal Pattern Correction Technology Department

We are looking for research engineers for lithography simulation. Lithography patterning is one of the key process of the most advanced semiconductor manufacturing. You will participate in it by simulating the system with the resolution enhancement technology for low-k1 lithography. Lithography simulation has a long history and it is still evolving. The ideal candidate would be research engineers who are familiar with lithography simulation, seek for new idea from conference/papers, and have a strong will to bring your new ideas to production.


  • Simulate lithography system with TSMC in-house lithography simulator. 
  • Seek new (or maybe old in other areas) resolution enhancement techniques for low-k1 lithography.
  • Develop and maintain lithography simulation software.
  • Analyze simulation/experimental data and summarize background scientific theories to propose the solution.
  • Work closely with Taiwan headquarters. 


  • B.S. or higher degree in a relevant field such as Physics, Electrical Engineering, or Computer Science.
  • Experience of lithography simulation and simulated image analysis.
  • Knowledge of partially coherent imaging, Fourier optics, or image formation theory.
  • Programming skill of C or C++. Programming skill of either Matlab or Python is a plus.
  • Knowledge in optics or electromagnetism is a plus.
  • Knowledge of empirical photoresist model is a plus.
  • Persistent to complete assigned work.
  • Effective written and verbal communication skills.

TSMC Technology Inc. is an Equal Opportunity Employer